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Discrete-Time Signals
In theory, a discrete-time signal is defined by a sequence of values corresponding to particular instants in time. The time instants where the signal is defined are called the signal's sample times; traditionally, a discrete signal is considered to be undefined at points in time between these instants. For a periodically sampled signal, the equal interval between any pair of sample times is the signal's sample period, T_{s}. The sample rate, F_{s}, is the reciprocal of the sample period, or 1/T_{s}. For example, the 7.5-second triangle wave segment below has a sample period of 0.5 sec, and sample times of 0.0, 0.5, 1.0, 1.5, ...,7.5. The sample frequency of the sequence is therefore 1/0.5, or 2 Hz.Time and Frequency Terminology
A number of different terms are used in this book to describe the characteristics of discrete-time signals found in Simulink models. These terms, which are listed in the table below, are frequently used in Chapter 4, "DSP Block Reference," to describe the way that various blocks operate on sample-based and frame-based signals. For additional information on frame-based processing, see "Understanding Samples and Frames" in this chapter.Discrete-Time Signals in Simulink
Simulink allows you to select from among several different simulation solver algorithms through the Solver options panel in the Simulation Parameters dialog box.Recommended Simulation Settings for DSP. The recommended Solver options settings for DSP simulations are:
With these settings, discrete signals in Simulink most accurately model the prototypical discrete signal described in the previous section. In particular, when these settings are in effect, discrete signals are undefined between sample times. Simulink generates an error when operations attempt to reference the undefined region of a signal, for example, when signals with different sample rates are added. To perform cross-rate operations like the addition of two signals with different sample rates, you must explicitly convert the two signals to a common sample rate. There are several blocks provided for precisely this purpose in the Signal Operations and Multirate Filtering libraries. See "Rate Conversion," later in this section, for more information. By requiring explicit rate conversions for cross-rate operations, Simulink helps you to identify sample rate conversion issues early in the design process. You can automatically set the above solver options for all new models by running thedspstartup
M-file. See "Configuring Simulink for DSP Systems" earlier in this chapter for more information.
Note
Because Simulink blocks typically apply a zero-order hold (ZOH) to outputs, the value of the signal between two adjacent sample times is the value at the earlier sample time. As an example, the signal's value at t=3.112 seconds is the same as the signal's value at t=3 seconds. In these two modes, a signal's sample times are the instants where the signal is allowed to change values, rather than where the signal is defined. Between the sample times, the signal is frozen at its last value.
As a result, in the Variable step and Fixed-step SingleTasking modes, Simulink permits cross-rate operations such as the addition of two signals of different rates. The next section explains how this works. More About Variable-Step and Fixed-Step SingleTasking Modes. Because in these modes a discrete-time signal is defined between sample times, if you sample the signal with a rate or phase that is distinct from the signal's own rate and phase, you still measure meaningful values. Consider the model below, which sums two signals having different sample periods. The fast signal (T_{s}=1) has sample times 1, 2, 3, ..., and the slow signal (T_{s}=2) has sample times 1, 3, 5, ....
The output, yout
, is a matrix containing the fast signal (T_{s}=1) in the first column, the slow signal (T_{s}=2) in the second column, and the sum of the two in the third column.
yout = 1 1 2 2 1 3 3 2 5 4 2 6 5 3 8 6 3 9 7 4 11 8 4 12 9 5 14 10 5 15As expected, the slow signal (second column) changes once every two seconds, half as often as the fast signal. Nevertheless, it has a defined value at every moment in-between because of the zero-order hold that the Signal From Workspace block applies to the output. (Simulink implicitly auto-promotes the rate of the slower signal to match the rate of the faster signal before the addition operation is performed.) In general, for Variable-step and Fixed-step SingleTasking modes, when you measure the value of a discrete signal in-between sample times, you are observing the value of the signal at the most recent sample time. Sample Time Offsets. Simulink offers the ability to shift a signal's sample times by an arbitrary value, which is equivalent to shifting the signal's phase by a fractional sample period. However, sample-time offsets are rarely used in DSP systems, and blocks from the DSP Blockset do not support them.